Microelectronic devices, such as semiconductor devices, imagers, displays, storage media, and micromechanical components, are generally fabricated on and/or in microfeature wafers using a number of processes that deposit and/or remove materials from the wafers. Electroplating is one such process that deposits conductive, magnetic or electrophoretic layers on the wafers. Electroplating processes, for example, are widely used to form small copper interconnects or other very small sub-micron features in trenches and/or holes (e.g., less than 90 nm damascene copper lines). Electropolishing is another process that removes material from a wafer. In both of these processes, an electrical current is passed between the wafer and one or more counter electrodes in a manner that deposits or removes material from a surface of the wafer.
One challenge of plating materials into narrow, deep recesses is that it is very difficult to completely fill the very small features and create a desired surface profile on the plated layer (e.g., uniformly planar, domed, etc.). For example, as the performance of microelectronic products increase, the aspect ratios and densities of the recesses substantially increases. To adequately fill such small, high density recesses with high aspect ratios, existing plating practices often plate a metal onto a very thin seed layer or directly onto a barrier layer. Thin seed layers and barrier layers, however, typically have relatively high resistances that cause a significant drop in current density from the edge of the wafer to the center during the initial stages of a plating cycle. The plating rate at the edge of the wafer is accordingly significantly higher than the center during the initial portion of the plating process, which causes the plated material at the edge of the wafer to be substantially thicker than the middle. This edge effect is further exacerbated by the higher densities and higher aspect ratios of the recesses. Therefore, reducing or eliminating the edge effect is a significant challenge that needs to be addressed to develop faster, higher performance semiconductor devices and other microfeature devices.
Several existing plating tools have reactors with a thief electrode attached to the wafer holder to mitigate the edge effect caused by high resistance of the wafer or by the geometry of the chamber. The thief electrode is biased at the same polarity as the wafer such that it modifies the electric field in the perimeter region of the wafer. The thief electrode accordingly reduces the plating rate at the perimeter of the wafer to compensate for the edge effect. Although such systems may mitigate the edge effect, they also have several disadvantages. First, particles that build up on the thief electrode may eventually become dislodged, and the close proximity of the thief electrode increases the likelihood that the dislodged particles will plate or otherwise adhere to the wafer. Moreover, it is difficult to minimize the formation of particles on a thief electrode attached to a wafer holder because the thief electrode is removed from the bath to unload finished wafers and load new wafers, and then the thief is reintroduced into the plating bath with each new wafer. Such wetting and drying of the film on the thief can make it difficult to control the quality of film on the wafer and minimize particles. It is also difficult to clean and maintain thief electrodes when they are attached to the wafer holder. This is problematic because thief electrodes must be cleaned relatively often, and it requires a significant amount of time and effort to detach the thief electrode from the wafer holder. Therefore, existing systems with thief electrodes carried by the wafer holder have several drawbacks.
Other types of systems have a plurality of anodes, a thief electrode separate from the wafer holder, and a virtual thief electrode defined by an aperture having a fixed size under the wafer. Such systems with detached thief electrodes generally position the thief electrode in the bottom portion of the reactor vessel. The present inventors have discovered that systems with virtual thief openings improve the performance of the reactors, but they also present additional challenges. One improvement is that dislodged particles from the thief electrode are not as likely to plate onto the wafer because thief electrode is not as close to the wafer. However, one disadvantage of not attaching the thief electrode to the wafer holder is that the systems are sensitive to misalignment between the wafer holder and the thief electrode or the anode(s). This is because the thief electrodes are fixed relative to the vessels of the chamber, but the wafer holder and vessel may not be properly aligned with each other, which causes misalignment between the wafer holder and the thief electrode or the anode(s). Such misalignment can lead to a side-to-side non-uniformity of the film plated onto the wafer, and is particularly problematic in systems in which the wafer is held stationary during processing (e.g., plating a magnetic alloy). This is not as problematic in systems in which the wafer is rotated during processing because any side-to-side non-uniformity can be average out, which greatly reduces the sensitivity of the system misalignment.
Another disadvantage of systems with detached thief electrodes is that they are highly dependent upon the geometry of the chamber to reduce the edge effect even when a thief electrode is used. For example, many existing systems use a shield below the wafer to block a perimeter portion of the wafer from the anodes. Such shields may limit the ability of the thief electrode to adequately control the current density at the perimeter of the wafer. The physical geometry of the chamber may accordingly limit the ability to control the edge effect. Although this is useful in specific plating applications, a plating tool is often used to process different types of wafers with different types of devices. Conventional systems accordingly require different shields for plating onto different wafers in many circumstances. This is problematic because it requires the chamber to be drained, partially disassembled, reassembled with a new shield, and then refilled and recalibrated for processing. This is an expensive and time consuming process to adapt the chamber to plate different types of wafers.
Still another disadvantage of several existing systems with detached thief electrodes is that the thief electrode is located in a lower portion of the chamber. The reaction chambers accordingly need to be drained and partially disassembled to access the thief electrode for cleaning. This is also an expensive and time-consuming process. Therefore, even though thief electrodes have been used in many electroplating apparatus for fabricating semiconductor devices, there is a significant need to improve electroplating chambers to plate materials into high density features with high aspect ratios.
In light of the foregoing, it would be desirable to provide an apparatus and method that ameliorates non-uniformities caused by an offset between the wafer holder and the vessel, reduces particle contamination associated with thief electrodes, and makes it easier to clean and maintain thief electrodes. It would also be desirable to provide electrochemical processing apparatus and methods that can compensate for seed layer or barrier layer resistance, or changes in the bath conductivity, to provide a desired current density across the wafer. There is also a need for a reactor that provides the ability to further control the surface profile of the plated layer across the diameter of the wafer.